Redox-based Tera-bit memories

Nanoscale resistive switching phenomena based, for example, on transition metall oxides or electrochemical metallization cells are considered as a future follow-up technology well beyond NOR and NAND flash.

Integration of TiO2 into Nano-Crossbar Arrays with 100 nm Half Pitch for Resisitve RAM Applications

Non-volatile resistively switching TiO2 is integrated into nano-crossbar arrays and nano-cross-points scaled down to a feature size of 100 nm by electron beam lithography. This represents fast fabrication route for high density prototype test structures of passive memory cores with two terminal devices. The structures and the integrated material is electrically characterized to gain an insight into the general properties of nano-crossbar arrays with resistively switching TiO2 and to define the demands for an external CMOS control system.

The persistent increase of memory integration density expressed by Moore’s law illustrates the demand for ever smaller structures: Nano-crossbar arrays are therefore widely investigated [1]. Nonvolatile and resistively switching materials with two stable states such as TiO2 are integrated as two terminal memory devices to efficiently create a RRAM bit pattern [2,3]. Figure 1 illustrates how these cells are integrated into crossbar arrays where the simple design reduces the cell size per bit to 4 F2. The switching material covers the whole chip area and every junction at a cross point is an addressable cell of a RRAM. Since the array consists of passive elements, additional active external circuitry is required for the operation to address the cells, set and reset their state and read the stored information [4,5].

Figure 1: Pattern of a crossbar array. The metallic top and bottom electrode (grey) sandwich the functional layer (pink) of a resistively switching material which is only illustrated at the junctions.

We report on a novel fabrication route to create crossbar arrays in the nanometer range. Structures of Pt electrodes with resistively switching TiO2/Ti layers offer a model system to study the properties of passive crossbar arrays and the specific requirement of these systems concerning external control structures for a CMOS hybrid.

ALD deposited TiO2 showed promising, non-volatile switching characteristics in micro structures and is convenient to integrate at low temperature [6]. Additionally, the material is temperature stable and compatible with CMOS devices. As a proof of concept a 50 nm thick TiO2 layer was deposited via rf-sputtering of Ti in an oxygenated atmosphere [7]. The layer was integrated into photo lithographically structured micro-crosspoints with 50 nm thick Pt electrodes fabricated via a lift-off process. Figure 2 shows the current response of a pulse pattern for a 1 × 1 µm² crosspoint structure. Extended investigations confirm the promising resistive switching properties of the material for 6000 cycles, illustrated in Figure 3.

Figure 2: Pulse pattern measurement. The set/reset voltages were 1.5 V and −2 V (upper graph), respectively, and both signals were limited at 50 µA and −300 µA. Pulse duration was 300 ms. The read voltage amounted to −0.15 V without any current limit, and the corresponding response was around 20 µA for ‘1’ state and 2 µA for ‘0’ state, respectively (lower graph). Here, pulse duration was 150 ms.

Figure 3: Endurance test with 300 ms pulses. The cell was tested for 6000 cycles with 1 set, 3 read, 1 reset and 3 read pulses.

Electron Beam Lithography in combination with a lift-off process is used to fabricate prototype test crossbar structures with a feature size of 100 nm (Figure 3). The lift-off process forms the metal electrodes using a two layer resist on a 1” × 1” SiO2 substrate. The bottom resist is a copolymer PMMA/MA with a thickness of 60 nm and the top resist is a PMMA polymer with a thickness of 25 nm. An electron beam dose of 200 μC cm−2 is necessary to write the 100 nm lines in the resist in order to expose the substrate along the specified structure during the development. As the copolymer is more sensitive to the electron beam than the polymer, this results in a larger expansion of the resist gap of the bottom layer, respectively a staged overhanging resist edge. This is mandatory for well defined metal structures after lift-off and in consequence no additional etching process is required to remove the residual resist in the gap. A combination of 5 nm Ti as adhesion layer with a 20 nm Pt film, which is deposited by electron beam evaporation serves as electrode material. Subsequently a non structured 30 nm thick TiO2 layer is sputtered as abovementioned. Finally, the electron beam lithography and the lift-off process are repeated to create the orthogonally arranged top electrode structures. The fabricated structures comprise single cells (1 × 1 bit), words (1 × n bit) and arrays (n × n bit) with half pitches down to 100 nm and sizes of n = 8, 16, 32 and 64 (Figure 4).

Figure 4: SEM picture of 64 × 64 bit nano-crossbar array with 100 nm half-pitch. The SEM inspection showes no structural defect within the array.

To get a general understanding of the resistively switching in the integrated TiO2 layer we characterized a single 100 × 100 nm² cell. The initial state of the cell is high resistive with a resistance of several GΩ and a diode like behavior. A current driven electroforming process with an increasing current (10 nA s−1) initializes the cell into the low resistive ‘ON’ state. Under this condition the cell exhibits a non-linear I(V) characteristic shown in Figure 5a. The corresponding R(V) curve is shown in Figure 5b. A negative voltage switches the cell to the high resistive, respectively ‘OFF’-state by exceeding a certain threshold value Vth−. This ‘OFF’ state differs for several orders of magnitude from the initial state and is also non-linear. To switch back into the ‘ON’-state, the polarization is changed and a positive threshold Vth+ has to be exceeded. A current limiter prevents the cell from a destructive electrical breakdown at 30 μA which leads to an abrupt jump in the I(V) curve. A nondestructive readout of the cell is performed by voltages within the range from Vth− to Vth+, and the resistance condition is nonvolatile even if no supply voltage is applied. In Figure 5b a read out voltage of 0.3 V exemplifies a resistance of 1.275 MΩ for the ‘OFF’-state and 36.274 kΩ for the ‘ON’-state corresponding to a ratio of 35. The high resistance ratio in combination with a high RON value and the feature of current determined readout instead of charge determination accommodates the demands for a CMOS hybrid.

Figure 5: I(V) characteristic of a single 100 × 100 nm² cell measured via Kelvin probing. (b) R(V) curve corresponding to Figure 5 a.

We fabricated nano-crossbar arrays by electron beam direct writing and integrated resistively switching TiO2. By downscaling to feature sizes of 100 nm we create addressable patterns with sizes up to 4096 bit and a potential density of 2.5 Gbit cm−2. Single memory cells were electrically characterized and showed non-volatile bipolar resistance switching. The electrical characterization was done in sweep as well as in pulse mode with. The electrical properties fulfill the demands for an integration and characterization of resistively switching materials.

C. Nauenheim, R. Rosezin, C. Kügeler, A. Rüdiger, S. Trellenkamp, R. Waser

Integration of Resistively Switching TiO2 Cells into Micro Crosspoint Cells

Non-volatile resistive switching binary cells of TiO2 for memory applications are arranged in micro crosspoint and crossbar array form. This represents a first preliminary model for fabrication processes of nano crossbar arrays as proof of concept. These photolithography-fabricated devices are furthermore electrically measured by static I-V measurements. The results offer first insights into the general properties of passive two terminal devices arranged in crossbar arrays, as well as it contributes to the examination of the suitability of TiO2. The determined resistance values and switching voltages point out the demands for arrays sizes and peripheral control logic.

The improvement of performance in information technology is a continual demand leading to a permanent enhancement of Moore’s Law. To establish future ultra fast logic systems and high memory densities, the constant reduction of technology nodes far into the sub 32 nm region will become a necessity. This is associated with an increasing number of technological and physical limits which, in turn require defect and failure tolerant systems based on reconfigurable devices. The ‘Fat Tree’ structure in combination with a ‘Logic Array Based Architecture’ implemented in the Teramac Concept by HP is a first paradigmatic change in this direction [1].

Our attempt is the development of a rewritable nonvolatile memory cells in combination with a resistively switching material. These switches have also the potential for future investigations of diode resistor logic which is not addressed yet here. Aside from solid state electrolytes, organic charge transfer materials or molecular monolayers, binary oxides like TiO2 are switching materials which seem to be suitable for this purpose [2]. Above all, this is justified by their thermal stability and simple compatibility with other materials, which is important for the combination with CMOS in a hybrid structure. The latter offers also an integration into a two terminal device that is automatically created at every junction of a crossbar array. These arrays with their perpendicular arranged set of simple parallel electrode lines, shown in Figure 1, present an appealing application for new fabrication methods like Nano Imprint Lithography, for example [3]. Additionally, theoretical approaches for the use of switching arrays in logic posses a prospect of logic and memory applications exclusively fabricated of these devices [4, 5].

Figure 1: SEM picture of an eight by eight bit micro crossbar. The width of the strip line amount to 1 µm which results in a cell size of 1 µm². The pitch of two adjacent lines is 1.5 µm.

Resistive switches for memory applications show at least two resistive states, in which every state represents a binary value. Writing or erasing the information or the bit is performed by changing the state of a junction while exceeding a certain threshold voltage. Reading the information can be accomplished by applying a smaller voltage and measuring the resulting current without influencing the preassigned condition of the device. To reliably distinguish these states it is important achieve a stable ratio between RON/ROFF with at least one to two orders of magnitude. Because the device is voltage controlled, its smallest resistance should also be considerably larger than the interconnect resistances to achieve a sufficient voltage drop and to reduce the influence for nearby cells in a high resistive state.

For our first studies we composed a micro crossbar array. The 100 nm thick Pt bottom-electrode is either buried in a SiO2 substrate to reduce surface roughness or structured on top of the SiO2 surface. As shown in Figure 2, we apply 30 nm up to 90 nm thick TiO2 layers via reactive sputter deposition. This layer covers the whole sample surface and requires no further alignment. To gain a certain asymmetry at the interface between electrode and switching material, what we assume as necessity for a stable switching behavior, we deposited a 10 nm thick Ti top-electrode under a second 100 nm thick Pt electrode. The sample fabrication concludes with the uncovering of the contact pads of the bottom-electrode by a dry etching step. The generated samples contain single crosspoint structures for electrical characterization without any crosstalk as well as whole arrays with up to 8 by 8 bit and different cell sizes down to 1 µm².

Figure 2: Schematical assembly of a crossbar structure

The single cells cycle through a closed switching I-V loop (Figure 3a) with two different resistive states (Figure 3b). Both indicate non-ohmic behaviors and are highly voltage dependent. The resistive state is changed by passing the appropriate threshold voltage. But by disconnecting the device from any voltage supply, the system remains in its resistive state and is considered as non volatile. However, long-term studies about the loss of information are still under investigation. The low resistive state is in the range up to several hundred ohm and switches stepless into the high resistive state. The latter exhibit a wide resistance range from several hundred ohm up to beyond thousand ohm for small voltages. Crossing the threshold voltage with a positive polarization at the Ti electrode results in an abrupt change of the resistance state. The current response varies analogical up to several milli amperes in the low resistive state, but it has to be limited by a current compliance to prevent an unintentional overstress. Our long-time investigations were also performed by static I-V measurements. Figure 4 displays every hundredth value of this measurement series. Whereas we present an exemplary read value determined at 0.3 V showing an adequate Ron/Roff ratio. The last pair was taken at the 4800th cycle after the break down of the cell.

Figure 3: (a) Static I-V trait of a binary cell with an area size of 5 × 7.5 µm² and a TiO2 layer thickness of about 90 nm. Plotted are the measured currents against the predefined voltage values (current compliance set to 12.5 mA). (b) R-V curve of the described I-V curve. The occurring resistance ratios represent up to more than one order of magnitude near the zero point. The red bar indicates the 0.3 V response that is used for read performance illustrations.

Figure 4: Evaluation of a long-term static measurement. The cell is statically cycled with a voltage driven bipolar triangular signal. The presented values are extracted at 0.3 V. The first value is the initial state which contains no bistable switching but an open loop causing two different currents depending on the raising or falling of the voltage signal. The last points indicate the break down of the switching behaviour which is nearly static state.

The presented work is, as introductory mentioned, a first attempt with the objective of nano integration processes for crossbar arrays. For the time being, some material parameters will be optimized. The occurring threshold values for switching are sufficient. Although the maximum current values seem to be large, scaling down the crossbar system to the nanometer range by the usage of technologies like e-beam direct writing or nanoimprint lithography promises to reduce these values by orders of magnitude. This is appropriate for external CMOS amplifiers as well as other related circuit elements.

C. Nauenheim, C. Kügeler, A. Rüdiger, R. Waser